IMS and RFIC Technical Sessions
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As the world rapidly embraces Artificial Intelligence (AI) and Machine Learning (ML) across various industries, the key question arises: how can we best leverage AI/ML to transform our own field? This workshop addresses this critical question by highlighting cutting-edge research from industry and academia experts who are using AI to transform microwave design. With new techniques emerging at an unprecedented pace, the workshop will shine a light on their revolutionary potential in RF and microwave engineering. The focus is on how AI is streamlining design processes, optimising results and enhancing productivity, ultimately helping engineers to navigate increasingly complex challenges in ways that were previously not possible. Our six distinguished speakers, all pioneers in their respective areas, will present a comprehensive view of AI’s role in advancing the entire spectrum of microwave engineering, including topics such as device modeling (including GaN PA), component synthesis (together with inductor, transformer and other passives), circuit (including RFIC and MMICs) and system design, performance optimisation (like PA linearisation) and electronic design automation (EDA) covering RF to THz frequencies. Attendees will gain valuable insights into how AI/ML is reshaping the future of microwave engineering, providing the tools and perspectives needed to stay ahead and empowering innovation and realisation of advanced devices to highly integrated modules/systems, enabling applications for 5G, 6G and beyond.
This half-day workshop titled "Integrating FR2 OAI and Hybrid RIS: Enhanced Network Management implementing FR2 OAI, ORAN, MIMO, and RIS" is designed to address the rapidly evolving technical landscape of mm-wave (FR2) OpenAirInterface (OAI) technology and network deployment with Dynamic RIS. The workshop will showcase cutting-edge developments in FR2 OAI, including its integration with ORAN architecture, and applications in ISAC and MIMO, as well as network deployment. Participants will benefit from presentations by experts who will share insights on innovative solutions and tools that enable advanced beamforming, intelligent RAN control, and efficient resource allocation in high-frequency networks.
The development of quantum computing shows no sign of slowing down, with multiple major players in the field recently announcing impressive achievements and aggressive roadmaps towards the deployment of quantum computers able to solve impactful problems for society. Though research and improvement of the core qubit technologies and the quantum processor units (QPUs) themselves have generally dominated the discourse in the quantum computing community, the engineering challenge of actually delivering complete scaled quantum computers with a full-fledged control/interaction framework is gaining increased attention as industrial and academic teams demonstrate qubit counts that push the envelope for I/O. This is especially problematic for technologies which require cryogenic environments, such as the popular superconducting qubit family, as a significant burden is incurred in trying to deliver necessary signals from room temperature through cabling down into the cryogenic environment itself. As proposed qubit counts on roadmaps increases beyond the 5000-physical-qubit mark, it is clear that interconnects will pose a massive challenge for the community. Though cryogenic electronics can help alleviate this, it does not resolve the fundamental problem of intra-fridge wiring towards the QPU proper. This half-day workshop collects academic and industrial speakers with deep expertise in this problem for discussions of the state-of-the-art in signal delivery, both for precision measurements and at scale. Attendees will be able to interact with experts to understand both the current best practices, but also hear about the bottlenecks and opportunities for innovative solutions from the broader microwave community.
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Frequency synthesizers are among the most critical blocks in wireless, wireline, and digital clocking applications. This workshop will cover both the fundamentals and the latest advances in frequency synthesis circuits and systems to efficiently generate LO signals with low phase noise, low spurious tones, and large modulation bandwidth. Prior-art techniques will be discussed in-depth, such as energy-efficient reference clocks, high-FOM wide-tuning range VCOs and DCOs, DPLL fundamentals, modern low-jitter fractional-N PLLs. Special attention will also be given to pulling and spur mitigation techniques, and injection-locked frequency multipliers. The workshop will be concluded by exploring FMCW generation for high-performance automotive radars.
Integrated communication and sensing capabilities are on a strong trajectory to become an integral part of the next generation of wireless systems. While the exploration of these techniques started decades ago, their development has accelerated with the increasing availability of highly integrated Si-based transceivers, baseband compute capabilities, and wireless testbeds for experimentation, and more recently AI. Nevertheless, the development of wireless systems with efficient joint communication and sensing capabilities remains a challenging multi-disciplinary task where EM, circuit design, signal processing, and ML techniques are relevant. The goal of this workshop is to bring together a set of active researchers on these topics to share their vision and expertise and enhance the cross-disciplinary awareness and understanding between the RFIC and systems communities. The speakers span academic and industrial research institutions from across the globe and the presentations will cover circuit, algorithm, and application aspects.
The workshop will delve into the design of ultra-low and low-power RF integrated circuits, emphasizing various applications where energy efficiency is paramount. This is particularly relevant within the Internet of Things (IoT) domain, which spans multiple application fields. Given that power consumption is a critical concern for all battery-powered or always-on applications, the workshop will comprehensively address this issue.
The workshop will commence with two presentations focusing on Silicon technologies optimized for such applications, specifically FD-SOI, FinFET, and emerging technologies such as gate-all-around nanoribbon transistors. Following this, two additional presentations will explore the trade-offs associated with the most power-intensive components, namely the frequency synthesis unit and power amplifiers.
The subsequent four presentations will concentrate on architectural innovations pertinent to low and ultra-low power RFIC solutions. This segment will begin with discussions on novel sensor interface solutions, such as event-driven operation systems. The final three presentations will address comprehensive system solutions designed for wireless environments, achieving power consumption down to sub-microWatt levels, and secure biomedical applications.
With rapid technological advances, the scope of communication systems is expanding significantly. Among the most groundbreaking developments are the use of mm-wave and sub-THz frequencies, which are poised to revolutionize wireless communication by unlocking unprecedented capabilities. This workshop will explore the transformative potential of mm-wave and sub-THz technologies, covering the frequency range from 30GHz to 300GHz. Once underutilized, these high-frequency ranges are now pivotal to major technological breakthroughs. Central to this advancement is the broadband front-end, which is crucial for effectively harnessing these frequencies for cutting-edge applications. A major focus of the workshop is the advancement of high-frequency communication technologies. Attendees will examine innovations in ultra-fast data transfer, low-latency networks, and the integration of mm-wave and sub-THz frequencies within wireless systems. These advances are reshaping connectivity, supporting the rollout of 5.5G and 6G networks, enhancing autonomous vehicles, and enabling smart cities. The workshop will also highlight the potential of 5.5G and 6G technologies to transform various industries. Additionally, the integration of Reconfigurable Intelligent Surfaces (RIS) and Radio-over-Fiber (RoF) technologies will be discussed, showcasing their critical roles in optimizing signal quality and extending network reach in the evolving landscape of 5.5G and beyond.
In the context of 6G and beyond, the performance demands are geared towards massive parallelization. For instance, the Non-Terrestrial-Network (NTN) is an essential component of future 6G wireless systems, and the next-generation SATCOM network will play an enabling role to support 6G NTN. High throughput, capacity, and low latency, and beamformed wireless links are the key success factors for NTN. Most existing SATCOM terminals, either on the ground or on the satellite payload, require large-sized phased array systems with 1024 elements or more per array. Such massive parallelization results in significant challenges not only in terms of integration density, but also on calibration and practical operation; a particularly challenging task in SATCOM-on-the-Move (SOTM) systems that necessitate fast beam forming and tracking. In this WS we will have an overview of potential process/circuit/system solutions addressing these challenges.
The ever-increasing demand for high-throughput communication links and high-resolution radar sensors is driving the development of future wireless systems at higher operating frequencies. In order to support multiple functionality, the flexibility requested to those systems, is driving the adoption of large phased array antennas and complex System-in-Package (SiP) Bit-to-RF or Optical-to-RF solutions. Heterogeneous technologies and vertical 3D integration will play a vital role in enhancing the performance and functional density, along with reducing the size and costs, of such RF systems. 3DHI will pose a new set of technology (processes and substrates), design (MMICS, RFIC, analog, power management, passives), packaging and thermal challenges, which will be addressed by renowned experts from Academia and Industry in this workshop.
This workshop will focus on self-interference cancellation techniques and implementations in Analog/RF, Digital, and ML domains for radar, full duplex, and frequency division duplex radio systems.
As the demand for high-speed wireless communication continues to grow, efficient PA design becomes critical for supporting modern communications network infrastructure, especially in the sub-20GHz spectrum (FR1 and FR3 bands). This workshop will delve into comprehensive design and development of power amplifiers (PAs) for sub-20GHz base station applications. The latest processes and technologies will be covered, focusing on semiconductor advances that drive power handling, linearity, and efficiency. Participants will explore theory and modeling principles to predict performance and optimize PA designs for various operational scenarios. The session will also emphasize architecture and design techniques, addressing key challenges such as linearity, efficiency, and bandwidth. Finally, the workshop will cover module design and integration, where participants will learn about packaging considerations and thermal management to ensure optimal performance in real-world deployments. This workshop is ideal for RF engineers, circuit designers, and researchers aiming to enhance their expertise in cutting-edge PA technology for wireless infrastructure. Participants will gain an in-depth understanding of key PA architecture and design techniques through interactive sessions with practical case studies.
This workshop provides an opportunity for presenters to share their work in addressing the challenges of unlocking the potential of the THz spectrum for future wireless communications and radar sensing applications. The presenters come from diverse backgrounds — including instrumentation manufacturing, metrology institutes, industry, and academia — offering a wide range of perspectives. Topics covered in this workshop include THz electronics, novel integration approaches for THz systems, interconnections and packaging technologies, photonics-based THz generation for communications, on-chip and waveguide antennas, design and characterization of high electron mobility transistors, and recent advances in testing and measurements up to 1THz and beyond.
The power amplifier is one of the most critical blocks in the transceiver and obtaining the desired performance from the PA at sub-THz frequencies remains a challenge. At sub-THz frequencies, transistors suffer from reduced gain impacting the performance of the PA. Designing sub-THz PAs with improved power added efficiency (PAE), output power, and linearity is an active area of research. SiGe and III-V technologies such as InP and GaN demonstrate higher fT and fmax than CMOS and as a result, sub-THz PAs designed in these technologies outperform their CMOS-based counterparts. On the other hand, CMOS can achieve better yield and higher level of integration compared to III-V technologies. In this workshop, the speakers will present recent developments in sub-THz PA design in CMOS, SiGe, and III-V technologies demonstrating their comparisons and trade-offs.
According to Global Market Insights Inc., the optical communication and networking market is expected to grow at a compound annual growth rate (CAGR) of 8.6% from 2024 to 2031, reaching $61.92 billion by 2031. The significant revenue comes from emerging technologies such as IoT (Internet of Things), machine-to-machine networks, AI, cloud-based services, and web-based applications. Driven by this demand, many innovations are underway to enhance optical communication systems. In this full-day workshop, we will learn about the latest advancements in the field of wireless and wireline optical networks.
The morning session of this workshop covers four talks on OWC (Optical Wireless Communication) and applications for Free Space Optics. The afternoon session focuses on wireline optical communication systems, with some talks elaborating on the circuit design techniques for high-speed transceivers.
This workshop will cover the latest industry developments and research trends in the design, large volume manufacturing, and characterization of superconducting, ion-trap, and semiconductor spin qubits along with the associated quantum processor architectures. We will start with a systematic and comprehensive comparison of the different qubit families, RF hardware realization challenges and their unique features. Presentations will also delve into cryogenic modeling, packaging, on-die small-signal and noise measurements and calibration at microwave and mm-wave frequencies of CMOS and SiGe HBT technologies needed in the control and readout electronics of these qubit families. We will end with the latest examples of such cryogenic control and readout circuits.
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Abstract:
Advancements in instrumentation and metrology over the past decade have been extraordinary, blurring the boundaries between measurement domains. We rely on these tools as windows into reality, yet the increasing complexity of measurement setups, abstraction of instrument functions, and limited user experience (often) result in erroneous characterizations. Faulty measurements not only risk reputational damage within the scientific community but can also lead to costly failures, potentially causing millions of dollars in losses during productization. This lecture celebrates the ingenuity of modern test equipment while also highlighting their limitations and the challenges of accurate DUT characterization.
Biography:
Shahriar Shahramian (SM ’06) received his Ph.D. degree from University of Toronto in 2010 where he focused on the design of mm-wave data converters and transceivers. Shahriar has been with the Bell Laboratories – Nokia since 2009 and is currently the Lab Leader (Director) of the RFIC & Packaging Research Lab. His research focus includes the design of mm-wave wireless and wireline integrated circuits and systems. Shahriar is a Bell Labs Fellow and leads the design and architecture of several state-of-the-art ASICs for optical coherent and wireless backhaul products. Shahriar has served as the chair mm-Wave & THz subcommittee of IEEE BCICTS & mm-Wave SoCs at IEEE RFIC and member of the technical program committee IEEE ISSCC. He has also served as the guest Editor of the IEEE Journal of Solid-State Circuits (JSSC).
Shahriar has been the recipient of Ontario Graduate Scholarship & University of Toronto Fellowship, and the best paper award at the CSICS & Symposium in 2005, 2015 and RFIC Symposium in 2015, 2020, 2022 and ISSCC& in 2018. Shahriar is also the recipient of the IEEE MTT Young Engineer Award in 2020. He holds an Adjunct Associate Professor position at Columbia University, has received several teaching awards and is the founder and host of The Signal Path educational video series. Shahriar has also presented short courses and workshops at the IEEE CSICS, BCTM, BCICTS, RFIC/IMS and ISSCC conferences.
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While much of RFIC design works in the linear time invariant regime where blocks such as amplifiers provide a constant response during all time, linear time variant circuits bring time variance through clocking and/or mixing to enable significant performance advances. These advances are already showing promise in applications such as increased throughput in phased arrays, enabling full-duplex communication systems, and filtering of RF blockers for high bandwidth receivers. This workshop will bring together multiple research areas of linear periodic time variant (LPTV) circuit techniques from experts in industry and academia to provide attendees with both the theory of operation and the circuit and system implementation. Beginning with theory, the first talk will overview the theory of operation and analysis of LTV circuits with intuitive time-frequency domain analysis for mixing and filtering operations suited towards software-defined radios. The second talk will overview non-uniform sampling and engineering the clock to realize time-approximation filters for mixed-signal receiver implementations. The third talk will discuss sharp filtering through sampling aliases in LPTV filtering applications. The fourth talk will present advances in discrete-time true-time delay technologies and non-reciprocal components for use in full-duplex systems and circulators. The final talk will show significantly increased phased array throughput using joint phase and time array using an LPTV true-time delay as a key component. To end the workshop, we will bring the experts together for cross-pollination of ideas through a panel interaction with attendees.
Despite the automation of many processes in the engineering world, microwave circuit design still remains very much an "art" rather than a "science". However, recent developments in intelligent algorithms, artificial intelligence, and machine learning make the automation of microwave circuit design a potential breakthrough of epic proportions. The ability to automatically design circuits meeting goal specifications would allow improved designs and more efficient use of designer time. This workshop discusses facets of automated circuit design, including the motivation for automated microwave design, the limitations of artificial intelligence, how automation can be placed in the design workflow, and applications of automated design to different potential microwave application spaces. The workshop will conclude with a panel session of all speakers to discuss the way forward in microwave design automation.
With the widespread use of mobile phones and smartphones, the contract for communication lines has shifted from being household-based to device-based. The wireless and mobile transformation of communication lines has improved communication speed and convenience, bringing significant changes to our society. However, electricity contracts remain at the household level and are limited to wired supply. The advancement of social implementation, such as DX (Digital Transformation), is predicted to significantly increase the number of sensors and IoT devices. In recent years, the development of 5G (fifth-generation mobile communication system) has aimed to establish a communication infrastructure capable of managing high volumes of traffic. However, significant challenges still persist regarding power supply methods for devices. To build a communication infrastructure capable of accommodating the increasing number of devices, wireless power supply methods to simplify battery replacement and charging are essential. This workshop focuses on research and development projects related to the integration of communication and power transmission. The requirements for research on the fusion of communication and power transmission include additive methods for incorporating wireless power transmission functionality into communication systems, power supply systems for communication purposes, mechanisms for simultaneous communication and power reception, device development for efficient conversion of radio waves into electrical energy, and the development of high-efficiency and cost-effective high-gain antennas. Wireless power transmission has recently been institutionalized in Japan and has begun commercial use. In the future, this theme will be of great importance in collaboration with Beyond-5G and 6G. The technologies presented in this session have the potential to significantly transform our energy utilization practices.