Addressing SiGe HBT Measurement Challenges Through the 16-Error-Term Calibration Method

This presentation will address the challenges involved in characterizing SiGe HBT transistors. To enhance transistor performance, process engineers continuously shrink transistor dimensions and minimize both extrinsic and intrinsic capacitances. These elements are in the order of few fF making them extremely prone to measurement errors. Moreover, commercial RF probes do not guide perfectly the EM field towards the device and are coupling with the substrate or are coupling together generating crosstalk and so generating measurement inaccuracy. To overcome these challenges, we propose utilizing on-wafer TRL calibration techniques to establish precise calibration standards for the 16-Error-Term Calibration Method.