A 22-nm CMOS 3.5–7.2GHz Wideband FEM with a Balanced-Power-Combining DPA and a Dual-Resonant Input Matching LNA

This paper presents a 3.5–7.2 GHz wideband front-end module (FEM) implemented in 22-nm CMOS technology. The FEM consists of a digital power amplifier (DPA) and a low noise amplifier (LNA). The DPA utilizes a 4-way balanced-power-combining (BPC) network with electrical coupling compensation to minimize broadband amplitude modulation (AM) and phase modulation (PM) mismatches among the four sub-arrays. To improve efficiency and linearity, an AM-PM distortion-canceling power cell is developed. The LNA employs a dual-resonant input matching (DRIM) approach to achieve wideband input impedance and noise matching. The DPA achieves a peak output power of 30.08 dBm with a drain efficiency of 43.31% at 6 GHz. For a 40 MHz 256-QAM signal, the average output power (Pavg) is 19.09, 21.07 and 17.18 dBm at 4.5, 6, and 7.2 GHz, respectively, with average drain efficiency (DEavg) of 20.39%, 20.6% and 18.5%. For a 20 MHz 1024-QAM signal, the Pavg is 16.7, 18.25 and 17.55 dBm at 4.5, 6 and 7.2 GHz with DEavg of 18.22%, 18.41% and 16.53%, respectively. The LNA achieves a peak S21 of 18.8 dB at 6 GHz, with the noise figure (NF) of 1.7 dB and S11 and S22 below -10 dB across the 3.5–7.2 GHz range.