This session presents the latest advances in state-of-the-art optical receivers, dielectric waveguide links, and high-speed converters.

This session discusses state-of-the-art silicon-based front-ends and building blocks from sub-6GHz to sub-mm-wave frequency range.

This session presents four transceivers and beamforming RFICs for 5G and mm-wave applications. The first paper is a V-Band 4-channel transmitter beamformer in 28nm CMOS with an OP1dB of 10.8dBm. The second paper is a dual-band 28/37GHz reconfigurable beamforming RFIC in 28nm FDSOI. The third paper is a 4×2 2D Butler matrix switched-beam chipset for 5G application in 28nm CMOS and the final paper is a phased array receiver front-end in 28nm FDSOI with a NF of

In this session, GaN FET modeling using artificial neural network as well a paper comparing various industry GaN models will be covered. A new T-gate RFSOI device method is explored for improved LNA device. Finally, layout tradeoffs using ALIGN software tool will be presented.

This session discusses state-of-the-art III-V front-ends and building-blocks including GaN wideband switches and front-end modules along with a InP sub-mm-wave receiver.

This session covers RF and mm-wave systems that span applications in space technology, D-band communications, all the way to biomedical implants. The session starts with an invited paper from NASA JPL on CMOS-based mm-wave spectrometer for performing scientific studies in space. The second paper covers scalable wafer-scale TX/RX phased array at 140GHz, while the third paper presents a baseband to D-band transmit module. The session wraps with an innovative millimeter-sized implantable glucose sensor using a fluorescent hydrogel.

The session focus is on reference clock and Phase-Locked Loop (PLL) design techniques for RF and mm-wave applications, starting with the introduction of a novel current-reuse coupled mixer phase detector, followed by design techniques for radiation hardened PLLs, then a fast-startup reference oscillator based on phase-aligned clock is introduced, and to conclude, a transformer-coupled BAW oscillator with very low jitter is presented.

This session discusses state-of-the-art silicon-based mm-wave reconfigurable/wideband and sub-mm-wave gain-boosted/wideband low-noise amplifiers (LNAs).

The session presents high-performance systems and circuits operating above 140GHz. A 140GHz OOK transceiver shows 26Gb/s data-rate in 28nm CMOS and a 400GHz system presents a multi-Gb/s link using PIN diodes in 90nm SiGe. A gain-boosted amplifier achieves high gain per stage at 190GHz in 65nm CMOS and a multiplier/amplifier chain transmitter demonstrates high output power and efficiency at 320GHz in 130nm SiGe.

This session presents recent advances in CMOS frequency multiplication techniques for mm-wave applications. The first two papers discuss circuit solutions to improve the power efficiency of mm-wave frequency doublers. The last two papers present techniques for harmonics rejection applied to a tripler and a quadrupler for E- and W-band applications.

Techniques in this session represent advances in wireless connectivity for NB-IoT and WiFi radios. For NB-IoT radios, advances in the state-of-the-art are presented with a sub-mm-wave receiver. For WiFi radios, this session presents a multi-beam phased array receiver in C-Band, a tri-band transceiver supporting 4096-QAM modulation, and a transmitter utilizing a 2-duty cycle harmonic rejection mixer for C-IMD3 linearization while consuming only 20mW of power.

This session will present four power amplifiers for the 5G mm-wave frequency range. The first two papers improve the bandwidth of the Doherty operation by using novel power-combining techniques. The first paper, implemented in 45nm SOI, implements a role-exchange of different main and auxiliary PAs over frequency. The second paper, implemented in 40nm CMOS, synthesizes a broadband Doherty combining network. The third paper in the session highlights the layout challenges for output combiners and presents 256-QAM measurements in 65nm SOI. The last paper achieves very low AM-PM by utilizing varactors and second harmonic traps in 40nm CMOS.

This session presents LO generation solutions spanning from RF to THz frequencies, implemented in a wide diversity of silicon technologies. The first paper demonstrates a 15.6GHz multi-core VCO in 8nm FinFET achieving excellent phase noise and wide tuning range. The second paper presents a 10.8–14.5GHz 8-Phase LO Generator with Automatic Phase-and-Duty-Cycle Calibration for N-path receivers in 28nm CMOS. The third paper brings in a high fundamental rejection inductor-less frequency-doubler, operating from 2 to 20GHz in 45nm RF-SOI CMOS. The last paper discusses a 0.4THz single-element radiator in 90nm SiGe BiCMOS, based on integrated PIN diode excitation at 100GHz.

Several novel techniques for self-interference mitigation are presented, including cancellation of interference caused by one transmitter to another in a dual-radio SoC, a distributed cascode power amplifier for full-duplex wireless, advances in frequency-domain-equalization-based wideband self-interference cancellation, and low-noise self-interference cancellation in a receiver.

This session reports circuits and systems advances in the mm-wave and sub-THz bands, covering topics from radar sensing to metrology. We start with three papers on advances in the 76–81GHz radar sensors. The first paper showcases a 5.5dB NF radar receiver in a 16nm FinFET followed by a wirelessly synchronized mono-/multi-static radar system. An 8dB NF mixer-first radar receiver with -5dBm IP1dB is also presented. We close with a focus on sensing advances at 160GHz operating frequency detailing a 0.05% resolution permittivity sensor at a 14µs integration window utilizing a whispering gallery resonator and multifold noise reduction techniques in 28nm CMOS, followed by an 18GHz tuning range 130nm SiGe/BiCMOS full-duplex radar transceiver.

This session shows the application of CMOS technology in several emerging applications. Within quantum technologies, an RF transmitter enabling magnetic sensing employing NV centers in diamond is demonstrated, followed by a cryogenic wireline transmitter for quantum processors. The next paper shows how silicon photonics can be employed to enhance the performance of an RF receiver. Finally, a mixer-free built-in self-test (BIST) method for phase and amplitude calibration of a beamforming IC is presented.

This session will focus on the system design and circuit implementation of mm-wave transceivers tailored for 5G and Satellite Communication (SATCOM) systems. The first paper proposes a dual LO topology, which simplifies complexity of digital and baseband sections in phased array systems. The second paper focuses on a multi-channel phased array at 39GHz with improved power amplifier efficiency. The third presentation describes the highly integrated baseband and IF section of an mm-wave radio for 5G, while the last presentation discusses an ultra-wide-band RF receiver with excellent NF, designed for SATCOM applications.

This session includes four papers on mm-wave key components and receivers. It starts from a compact active quasi-circulator with ultra-wideband TX to RX isolation over 20–38.5GHz in 28nm CMOS. The second paper presents a new D-band phase-shifter concept based on delay manipulating and achieves RMS phase-error of 1.2 degrees without calibration in 45nm RFSOI. The next two papers are high-performance receivers. The first paper presents a 140GHz 4-element RF beamforming receiver, achieving >20dB IRR with 8GHz channel bandwidth in 22nm FDSOI. The final is an N-path filter based block-tolerant receiver with

In this session, we present papers addressing IoT transmitter and sub-THz PAs. The first paper presents a passive mixer in 22nm FD-SOI technology for low-power cartesian transmitter. The second paper showcases a D-band SiGe HBT PA module providing high output power (>20dBm) and linearity from 110 to 170GHz. The third paper demonstrates a transformer-based InP HBT PA with high linear power (20dBm) and efficiency (>20%) in D-Band. The last paper presents a SiGe HBT PA operating at 300GHz in a 130nm BiCMOS technology using capacitive feedback.

This session is dedicated to industry presentations. The first presentation will be on recent research results on D-band circuits and systems implemented in 55nm SiGe BiCMOS technology. The second presentation will discuss thermal challenges in GaAs PAs for 5G applications. The last talk will present recent results on PAs implemented in 22nm FDSOI technology with EDMOS.