A 126–137GHz Regenerative Frequency Shifter in 22nm FDSOI

This paper presents the concept of a regenerative D-band frequency shifter. The circuit can be viewed as an extension of the Miller fractional frequency generator. Yet, as opposed to the second-order Miller modulator, we propose an architecture based on two mixers. By careful choice of the bandpass filter networks, providing sufficient loop gain, and enforcing loop phase conditions for the wanted spur, one can suppress the unwanted spurs and support the loop oscillation at the desired frequency. The output signal is only present when an input is applied. The main spur at the output fOUT follows the input frequency fIN as fOUT = fIN + fOFFSET. To verify the proposed concept we present an integrated circuit realized in 22nm FDSOI CMOS. Among the different applications of this circuit, we find a low-power alternative to a fractional multiplier for generating narrowband carrier frequencies in the LO chain. For example, for an input frequency of 80 GHz, the circuit yields an output at 140 GHz, resulting in an effective fractional multiplication ratio of 7/4. The proposed circuit consumes 81mW from a single 0.8V supply and operates over an output frequency range of 126–137 GHz. A peak output power of 4.9dBm is measured at 127 GHz. The spur suppression is above 29 dB. To the best of authors’ knowledge, this is the first dynamic frequency shifter in D-band.