A Cryogenic CMOS RF Receiver for Multiple Spin Qubit Readout: From Specifications to Implementation and Qubit Testing

Quantum computers (QC) promise to solve certain computational problems exponentially faster than a classical computers due to the superposition and entanglement properties of quantum bits (qubits). Among several qubit technologies, spin qubits are a promising candidate for large-scale QC, since (1) they have a small footprint allowing them to be densely integrated, and (2) they can operate at relatively high temperatures (>1K), potentially reducing system cost and complexity. This presentation firstly discusses different readout schemes for spin qubits, such as DC readout, radio-frequency reflectometry, and gate-based readout. The drawback and benefits of each structure are also compared in terms of scalability, readout speed, and fidelity. For the rest of the talk, the main focus will be on the gate-based readout in which the qubit state can be detected by probing the shift of the resonance frequency of a high-impedance resonator connected to the readout gate of a double quantum dot (DQD). The amount of the state-dependent capacitance change and the resonator frequency shift is also quantified based on the power of the applied RF tone and DQD physical parameters. Then, we shift the gear towards the challenges and constraints in the design of a cryogenic-CMOS (Cryo-CMOS) RF receiver for the gate-based readout of spin qubits. Finally, after showing the electrical performance at room temperature and 4.2K, the cryo-CMOS receiver is used to measure the DQD charge stability diagrams. This is a critical step towards the integration of cryogenic readout systems, facilitating the development of a scalable silicon-based quantum computer.