A 46.7-dB Gain 9.3-K Noise Temperature 5.8-mW Two-Fold Current Reuse Dual Noise-Canceling LNA in 28-nm CMOS for Qubit Readout

This paper presents a novel cryogenic high gain, low power two-fold current-reuse with dual noise-canceling (NC) low-noise amplifier (LNA) in 28-nm CMOS. The proposed LNA consists of the current reuse cascode inverting input stage with shunt-resistive feedback and self-body bias (SBB) to mitigate the variation of Vth and rout under cryogenic temperatures. A common-source (CS) main amplifier is used, followed by a current reuse dual NC stage with LC networks to form an equivalent parallel CS configuration, which can suppress the noise of both the main amplifier and auxiliary amplifier. At 4 K, the LNA attains a measured peak gain (S21) of 46.7 dB with a 3-dB bandwidth of 0.01–2.2 GHz and minimum NF of 0.136 dB (9.3 K noise temperature) at 0.6 GHz under power dissipation of only 5.8 mW. The circuit occupies a core area of 0.17 mm². The proposed work achieves FoM among the best in the sub-3 GHz cryogenic CMOS LNA reported to date.