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Silicon Photonics-Based Optical I/O for Next-Gen XPUs
For over 2 decades, all-electrical off-package wireline communication has delivered a predictable ~2× BW improvement every 3–4 years. Continuing this phenomenal scaling trend will require a shift to optical I/O. In particular, co-packaged silicon photonic transceivers promise significant improvements in bandwidth density and power efficiency by bringing optics closer to the compute ASIC. This talk will review recent advances on multiple fronts — silicon photonic devices, CMOS interface circuits, and IC packaging — that have proven the technical feasibility of this approach. It will also cover challenges for high-volume proliferation and future technology directions in this domain.