Polarization-Engineered III-N mm-Wave Transistors for Linearity, Efficiency, and Reconfigurability

To continue advancing the performance of mm-wave communication systems and other applications, transistors offering high-speed performance with low power consumption while simultaneously delivering low noise figure, high linearity, and high efficiency are essential. Devices to support reconfigurable circuit architectures (eg to support frequency-agile and compact circuit/system implementations) are also critical. The unique properties of the III-N material system (eg polarization engineering, LO phonon mediated electron transport) enable new approaches in the design of transistors for power amplifiers and low-noise amplifiers, while the integration of ferroelectrics in the gate stack provides an additional route to exploit polarization engineering for increased functional density and improved performance in signal switching and routing applications. In this talk, device designs exploiting polarization engineering of the heterostructure as well as gate stack to provide improved linearity, noise figure, and power efficiency will be described; the device concepts, physics-based modeling framework, and experimental validation will be discussed.