A 112.64-Gb/s CMOS D-band Channel-Aggregation RX System-in-Package

This paper presents an energy-efficient wideband D-band wireless receiver module based on channel-aggregation. It is composed of a multi-channel receiver IC in 45-nm CMOS technology and an in-package antenna fabricated using a low-cost multi-layer PCB. The receiver comprises four down-conversion chains with dedicated millimeter-wave local oscillator generators and operates over contiguous sub-bands around 139.32 GHz. A 34-GHz bandwidth signals composed of four sub-bands is received where each sub-band, containing at its turn several base-band channels, is down-converted separately by the multi-channel receiver IC. Overall, the presented wireless system demonstrates a data rate of 112.64 Gb/s by receiving and demodulating a signal composed of 16×2.16 GHz channels from 122.04 to 156.6 GHz using 16-QAM scheme at a maximum distance of 2.5 m from a commercial transmitter. The chip consumes 710 mW and occupies an area of 8.6 mm2. The energy efficiency is 6.3 pJ/bit, including the multiple LOs on-chip generation circuitry.