A 9-11 GHz Multistage Switched-Capacitor Delay Element and Signal Repeater Achieving 4.6-71.4 ns Delay and 40 dB Gain

A 9-11 GHz delay element and signal repeater device employing a passive multistage switched-capacitor approach operating in the alias regime is presented. The proposed approach enables tens of ns of delay at X band frequency while limiting the required sample rate and power consumption. On-chip chopping operation further enables large gain for arbitrary signal repeating applications. The device was implemented in a 45 nm SOI CMOS process and achieves a 4.6-71.4 ns programmable delay range with 125 ps resolution across a 3-dB bandwidth of 2 GHz. The device achieves 40 dB maximum gain, 3.8 dB minimum noise figure, and consumes 123 mW from a 1V supply with an active area of 0.75 mm2.