A 3.5-to-14GHz, Less-Than-0.81LSB-INLpp, 7b Adaptive Phase Interpolator with Segment-Squeeze INL Calibration Algorithm for Die-to-Die Interfaces

Addressing the stringent requirements for high linearity and compact footprint in die-to-die (D2D) interfaces, this paper presents a 7-bit adaptive phase interpolator (PI) employing a segment-squeeze integral nonlinearity (INL) calibration (SSIC) algorithm. Fabricated in 28nm CMOS, the design achieves automatic calibration through a multi-lane shared loop. The PI operates over a frequency range of 3.5–14GHz with a compact core area of 0.0207 mm². Measurement results demonstrate that the peak-to-peak INL (INLpp) is less than 0.81 LSB at 14GHz, achieving state-of-the-art performance and exhibiting robust resilience against process, voltage, temperature (PVT) variations.