A 110–142-GHz Frequency Quadrupler With 13.1-dBm Psat Achieved by Coupled-Line-Based Output Matching Technique in 130-nm SiGe

This paper presents the design and measurement of a SiGe D-band frequency quadrupler, which is composed of two push-push frequency doublers (FDs) and an inter-stage driver amplifier. The simulation results indicate that implementing a purely inductive load impedance at the fundamental frequency of the FD can significantly enhance the output power. We propose a coupled-line-based output matching technique that simultaneously realizes the optimal fundamental and second harmonic load impedances for the output-stage FD. The measurement results of the fabricated quadrupler chip demonstrate a peak saturated output power of 13.1 dBm and a 3-dB bandwidth of 110–142 GHz, while the peak and saturated conversion gains reach 17.2 and 13.3 dB, respectively