A 5.2∼7.8 GHz Cryo-CMOS LNA with 4-K Noise Temperature with Cascode gm-boosting and Current Reuse for Noise Reduction

This work presents a 5.2∼7.8 GHz cryo-CMOS LNA, exploring the noise boundary of CMOS technology at 4.2 K. For the 1st-stage cascode device, the size (240 μm/60 nm) and current density (∼44 μA/μm) are optimized for low Fano factor of shot noise and high transconductance. Since high transconductance efficiency leads to low noise, a transformer-based gm-boosting circuit enhances the gm by 3×. In addition, the current of the 1st-stage cascode device and the 2nd-stage common source MOSFET is reused, reducing the device self-heating. Furthermore, a high-Q, off-chip inductor is used to address the noise mismatch issue. Measured at 4.2 K, the LNA attains a peak RF gain of 38 dB with a 3 dB bandwidth of 5.2∼7.8 GHz. A minimum noise temperature of 4 K is recorded at 6.25 GHz with a DC power of 10.6 mW. With a core area of 0.23 mm2, a figure-of-the-merit of 101.3 is achieved.