A 91–125 GHz 6-Bit RF Beamforming Receive Channel Using a Dual Current-Steering Phase Shifter With a Digitized Transistor Core and Tunable Gate Bias in 22-nm FD-SOI

This paper presents a 91-125 GHz radio frequency (RF) beamforming receive channel fabricated in 22-nm CMOS fully depleted silicon-on-insulator (FD-SOI) technology. The channel consists of a wideband low-noise amplifier (LNA) and a phase shifter (PS) with 2 modes. The PS is based on dual current-steering variable-gain amplifiers (VGAs) with digitized common-gate (CG) transistor arrays and tunable CG gate bias. In PS 5-bit digital-mode, the channel achieves 0.16-0.65 dB root-mean-square (RMS) gain error and 0.67°-4.2° RMS phase error over the full bandwidth. In PS 6-bit hybrid-mode, the RMS gain and phase errors are reduced to 0.1–0.4 dB and 0.5°-2.6°. The channel achieves a peak gain of 22 dB with a 3-dB bandwidth of 91–125 GHz, a noise figure (NF) of 6–7.8 dB and an input 1-dB compression point (IP1dB) of -31 to -25.6 dBm while consuming 77 mW of DC power, making it well suited for 6G sub-THz applications.