Craig Barratt Plenary1Plenary Speaker 1

Dr. Craig Barratt

Senior Vice President, Google Access

"Innovations for Enabling Scalable Wireless Capacity"

Abstract: Wireless technologies are steadily approaching Shannon limits. Network densification (reuse), unlocking swathes of new spectrum, and spatial multiplexing gains via multiple antennas are key to delivering higher network capacity. Enabling these concepts to coherently work together — while also achieving practical, lower cost networks — is itself a key challenge. Dr. Barratt will share perspectives on technologies that enable more efficient use of spectrum and greater network capacity to support the future growth of the wireless Internet.

About Craig Barratt
Craig Barratt is an industry leader in wireless technology and communications. He joined Google in 2013, and oversees its Access division, which includes Google Fiber, the gigabit-speed internet service, OnHub, Google’s smart Wi-Fi router, and Railtel, its project to provide Wi-Fi service at up to 400 railway stations across India. The co-inventor of 34 US patents, Craig was previously President and CEO of Atheros, one of the semiconductor pioneers of Wi-Fi, where he led its public offering in 2004 and sale to Qualcomm for US$3.6 billion in 2011. He is sometimes referred to in the industry as “the other Craig Barratt” to avoid confusion with former Chairman and CEO of Intel, Craig Barrett. Craig holds PhD and Master’s degrees in electrical engineering from Stanford University, and B.Eng. and B.Sc. degrees from the University of Sydney. He is the co-author of a book on Linear Controller Design and several open source projects.


K Lawrence Low Plenary2Plenary Speaker 2

Dr. K. Lawrence Loh

Corporate Senior Vice President, MediaTek
President, MediaTek USA

"RFIC under Big Digital Semiconductor Companies: Challenges and Opportunities"

Abstract: In recent years the semiconductor industry has entered a massive wave of consolidation due to slowing growth and rising costs. Semiconductor companies, excluding foundries, memory makers and vertically integrated companies, have been gradually divided into two categories: larger-scale SOC platforms based “big-digital” companies and moderate-to-smaller scale IC components based “non-big-digital” companies. For roughly over 15 years, RFIC designers of “big digital” companies have demonstrated increasingly digitized RF circuits and systems to take advantage of continually shrinking process technologies. Nevertheless these designers are also facing unprecedented challenges to share bulk substrates of sensitive RF/analog circuits with increasingly noisy digital high speed and high switching-current circuits. When Moore’s Law is reaching its plateaus of frequency walls and per-transistor costs, RF designers would need to further deal with sophisticated cost/performance tradeoffs to decide on the right technologies and partitions between RFICs and SOCs. Although RFIC has played its traditional role as the “enabler” of wireless SOC platforms, opportunities have continued to grow to motivate more innovations to differentiate from other SOC platform providers. In this talk, we will address potential opportunities and associated technical challenges from a “big-digital” company’s RFIC designers’ views.

About K. Lawrence Loh
Dr. Kou-Hung Lawrence Loh is a Corporate Senior Vice President of MediaTek Inc., responsible for centralized corporate R&D and engineering functions including RF, analog/mixed-signal and circuits/hardware engineering and technology development for all MediaTek’s product lines including wireless communication, mobile application processors, wireless connectivity, home entertainment, optical storage and broadband/networking business. He is also President of MediaTek USA overseeing the company’s global operations in Europe and America. Dr. Loh started his first circuit design position at IMP and later he joined Cirrus Logic, where his last position was Director of Analog IC Engineering. In 1998, Dr. Loh founded Silicon Bridge Inc. Before joining MediaTek in 2004, Dr. Loh had contributed to IC design industry in areas of read/write channels for magnetic and optical storage, high-performance analog filters, solid-state fingerprint sensors, high-speed SERDES and wireline transceivers for various business applications. Dr. Loh received his Ph.D. degree in Electrical Engineering from Texas A&M University, College Station, Texas. He has authored/co-authored dozens of technical papers/patents on IC/system designs. Dr. Loh served on ISSCC Technical Program Committee. He is on Steering Committee of A-SSCC and Board of Directors for Global Semiconductor Alliance (GSA).